A report on Processor register and Accumulator (computing)

Walther WSR-16 mechanical calculator. The row of digit-wheels in the carriage (at the front), is the Accumulator.

Front panel of an IBM 701 computer with lights displaying the accumulator and other registers

In a computer's central processing unit (CPU), the accumulator is a register in which intermediate arithmetic logic unit results are stored.

- Accumulator (computing)

Data registers can hold numeric data values such as integer and, in some architectures, floating-point values, as well as characters, small bit arrays and other data. In some older and low-end CPUs, a special data register, known as the accumulator, is used implicitly for many operations.

- Processor register

2 related topics with Alpha

One instruction may have several fields, which identify the logical operation, and may also include source and destination addresses and constant values. This is the MIPS "Add Immediate" instruction, which allows selection of source and destination registers and inclusion of a small constant.

Instruction set architecture

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Instruction set architecture , also called computer architecture, is an abstract model of a computer.

In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA.

1-operand (one-address machines), so called accumulator machines, include early computers and many small microcontrollers: most instructions specify a single right operand (that is, constant, a register, or a memory location), with the implicit accumulator as the left operand (and the destination if there is one):, ,.

The x86 architectures were based on the Intel 8086 microprocessor chip, initially released in 1978.

X86

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Family of complex instruction set computer instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant.

Intel Core 2 Duo, an example of an x86-compatible, 64-bit multicore processor

AMD Athlon (early version), a technically different but fully compatible x86 implementation

Registers available in the x86-64 instruction set

In supercomputer clusters (as tracked by TOP 500 data and visualized on the diagram above, last updated 2013), the appearance of 64-bit extensions for the x86 architecture enabled 64-bit x86 processors by AMD and Intel (teal hatched and blue hatched, in the diagram, respectively) to replace most RISC processor architectures previously used in such systems (including PA-RISC, SPARC, Alpha, and others), and 32-bit x86 (green on the diagram), even though Intel initially tried unsuccessfully to replace x86 with a new incompatible 64-bit architecture in the Itanium processor. The main non-x86 architecture which is still used, as of 2014, in supercomputing clusters is the Power ISA used by IBM Power microprocessors (blue with diamond tiling in the diagram), with SPARC as a distant second.

The registers SI, DI, BX and BP are address registers, and may also be used for array indexing.

For example, using AL as an accumulator and adding an immediate byte value to it produces the efficient add to AL opcode of 04h, whilst using the BL register produces the generic and longer add to register opcode of 80C3h.