Advanced Programmable Interrupt Controller

Computer simulation, one of the main cross-computing methodologies.

Family of interrupt controllers.

- Advanced Programmable Interrupt Controller
Computer simulation, one of the main cross-computing methodologies.

28 related topics

Relevance

Computer simulation, one of the main cross-computing methodologies.

Programmable interrupt controller

Integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously.

Integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously.

Computer simulation, one of the main cross-computing methodologies.

In other cases, it has been replaced by the newer Advanced Programmable Interrupt Controllers which support more interrupt outputs and more flexible priority schemas.

Pentium (original)

Fifth generation, 32-bit x86 microprocessor that was introduced by Intel on March 22, 1993, as the very first CPU in the Pentium brand.

Fifth generation, 32-bit x86 microprocessor that was introduced by Intel on March 22, 1993, as the very first CPU in the Pentium brand.

Intel Pentium A80501 66 MHz SX950 Die Image
Intel Pentium microarchitecture
Intel Pentium P54C die shot
Intel Pentium MMX microarchitecture
Pentium MMX 166 MHz without cover

It also allowed two-way multiprocessing, and had an integrated local APIC and new power management features.

Closeup of an Intel 8259A IRQ chip from a PC XT.

Intel 8259

Programmable Interrupt Controller designed for the Intel 8085 and Intel 8086 microprocessors.

Programmable Interrupt Controller designed for the Intel 8085 and Intel 8086 microprocessors.

Closeup of an Intel 8259A IRQ chip from a PC XT.
Pinout
NEC D8259AC, used on the original IBM PC motherboard.

The 8259 has coexisted with the Intel APIC Architecture since its introduction in Symmetric Multi-Processor PCs.

AMD Phenom Die

X86 virtualization

Use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.

Use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.

AMD Phenom Die
Intel Core i7 (Bloomfield) CPU
A Linux kernel log showing AMD-Vi information

This technology, as announced, does not support x2APIC.

Example of ACPI tables of a Lenovo laptop.

Advanced Configuration and Power Interface

Open standard that operating systems can use to discover and configure computer hardware components, to perform power management (e.g. putting unused hardware components to sleep), to perform auto configuration (e.g. Plug and Play and hot swapping), and to perform status monitoring.

Open standard that operating systems can use to discover and configure computer hardware components, to perform power management (e.g. putting unused hardware components to sleep), to perform auto configuration (e.g. Plug and Play and hot swapping), and to perform status monitoring.

Example of ACPI tables of a Lenovo laptop.
This screen was seen until Microsoft required ACPI. Outside of a few anomalies, this screen is not seen by default since Windows 2000, although renderings for it still exist as of Windows 11

Released in June 2009, revision 4.0 of the ACPI specification added various new features to the design; most notable are the USB 3.0 support, logical processor idling support, and x2APIC support.

EDVAC, one of the first stored-program computers

Programmable interval timer

Counter that generates an output signal when it reaches a programmed count.

Counter that generates an output signal when it reaches a programmed count.

EDVAC, one of the first stored-program computers

The LAPIC in newer Intel systems offers a higher-resolution (one microsecond) timer.

Intel C8253

Intel 8253

The Intel 8253 and 8254 are programmable interval timers (PITs), which perform timing and counting functions using three 16-bit counters.

The Intel 8253 and 8254 are programmable interval timers (PITs), which perform timing and counting functions using three 16-bit counters.

Intel C8253
Intel 8253 programmable interval timer. Intel 8254 has the same pinout.
Block diagram of Intel 8253

Newer motherboards include additional counters through the Advanced Configuration and Power Interface (ACPI), a counter on the Local Advanced Programmable Interrupt Controller (Local APIC), and a High Precision Event Timer.

In The Signal by William Powell Frith, a woman sends a signal by waving a white handkerchief.

Message Signaled Interrupts

Alternative in-band method of signalling an interrupt, using special in-band messages to replace traditional out-of-band assertion of dedicated interrupt lines.

Alternative in-band method of signalling an interrupt, using special in-band messages to replace traditional out-of-band assertion of dedicated interrupt lines.

In The Signal by William Powell Frith, a woman sends a signal by waving a white handkerchief.

On Intel systems, the LAPIC must be enabled for the PCI (and PCI Express) MSI/MSI-X to work, even on uniprocessor (single core) systems.

ICH - 82801AA

I/O Controller Hub

Family of Intel southbridge microchips used to manage data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture.

Family of Intel southbridge microchips used to manage data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture.

ICH - 82801AA
ICH2
ICH3-M
ICH4
ICH5
ICH6M
NH82801GB - ICH7 Base
82801HBM
82801IBM

Integrated I/O APIC supporting 24 interrupt sources

interrupt sources and processor handling

Inter-processor interrupt

Special type of interrupt by which one processor may interrupt another processor in a multiprocessor system if the interrupting processor requires action from the other processor.

Special type of interrupt by which one processor may interrupt another processor in a multiprocessor system if the interrupting processor requires action from the other processor.

interrupt sources and processor handling

On IBM PC compatible computers that use the Advanced Programmable Interrupt Controller (APIC), IPI signalling is often performed using the APIC.