Clock signal

clock cycleclockclock cyclestwo-phase clockclock distribution networkclock pulseclock treeclockstiming signalsclock domain
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.wikipedia
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Clock generator

timing sourcesclockclock oscillators
A clock signal is produced by a clock generator.
A clock generator is an electronic oscillator (circuit) that produces a timing signal (known as a clock signal and behaves as such) for use in synchronizing a circuit's operation.

Microprocessor

microprocessorsprocessorchip
The preeminent example of such complex chips is the microprocessor, the central component of modern computers, which relies on a clock from a crystal oscillator.
The microprocessor is a multipurpose, clock driven, register based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output.

Double data rate

DDReffective transmission rateDDR bus
Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle.
In computing, a computer bus operating with double data rate (DDR) transfers data on both the rising and falling edges of the clock signal.

Crystal oscillator

crystalquartz oscillatorquartz crystal
The preeminent example of such complex chips is the microprocessor, the central component of modern computers, which relies on a clock from a crystal oscillator.
This frequency is often used to keep track of time, as in quartz wristwatches, to provide a stable clock signal for digital integrated circuits, and to stabilize frequencies for radio transmitters and receivers.

Asynchronous circuit

asynchronousasynchronous logicasynchronous CPU
The only exceptions are asynchronous circuits such as asynchronous CPUs.
An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not governed by a clock circuit or global clock signal.

Square wave

squaresquare-wavepulse
Although more complex arrangements are used, the most common clock signal is in the form of a square wave with a 50% duty cycle, usually with a fixed, constant frequency.
They are used as timing references or "clock signals", because their fast transitions are suitable for triggering synchronous logic circuits at precisely determined intervals.

Synchronous circuit

synchronoussynchronous logicsynchronous system
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
A synchronous circuit is a digital circuit in which the changes in the state of memory elements are synchronized by a clock signal.

CPU multiplier

clock multipliermultiplierbus-to-core frequency ratio
Many modern microcomputers use a "clock multiplier" which multiplies a lower frequency external clock to the appropriate clock rate of the microprocessor.
In computing, the clock multiplier (or CPU multiplier or bus/core ratio) sets the ratio of an internal CPU clock rate to the externally supplied clock.

Four-phase logic

A "4-phase clock" has clock signals distributed on 4 wires (four-phase logic).
It uses a kind of 4-phase clock signal.

Clock rate

clock speedclock frequencyclock
Many modern microcomputers use a "clock multiplier" which multiplies a lower frequency external clock to the appropriate clock rate of the microprocessor.
The clock distribution network inside the CPU carries that clock signal to all the parts that need it. An A/D Converter has a "clock" pin driven by a similar system to set the sampling rate.

Dynamic logic (digital electronics)

dynamic logicdynamic loadstatic logic
Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as spread-spectrum clock generation, dynamic frequency scaling, PowerNow!, Cool'n'Quiet, SpeedStep, etc.Devices that use static logic do not even have a maximum clock period; such devices can be slowed down and paused indefinitely, then resumed at full clock speed at any later time.
Dynamic logic is distinguished from so-called static logic in that dynamics logic uses a clock signal in its implementation of combinational logic circuits.

Clock gating

autonomous peripheral clock gatingclock-gatedperfect clock gating
To save energy, clock gating temporarily shuts off part of the tree.
Clock gating saves power by adding more logic to a circuit to prune the clock tree.

Race condition

race conditionsracedata race
the clock signals can severely limit the maximum performance of the entire system and create catastrophic race conditions in which an incorrect data signal may latch within a register.
Certain systems can tolerate such glitches but if this output functions as a clock signal for further systems that contain memory, for example, the system can rapidly depart from its designed behaviour (in effect, the temporary glitch becomes a permanent glitch).

Spread spectrum

spread-spectrumdigital frequency spectrumdigital spread spectrum
Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as spread-spectrum clock generation, dynamic frequency scaling, PowerNow!, Cool'n'Quiet, SpeedStep, etc.Devices that use static logic do not even have a maximum clock period; such devices can be slowed down and paused indefinitely, then resumed at full clock speed at any later time.
A synchronous digital system is one that is driven by a clock signal and, because of its periodic nature, has an unavoidably narrow frequency spectrum.

Flip-flop (electronics)

flip-flopflip-flopslatch
Because the two phases are guaranteed non-overlapping, gated latches rather than edge-triggered flip-flops can be used to store state information so long as the inputs to latches on one phase only depend on outputs from latches on the other phase.
Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered).

Clock skew

skewtiming skewdeskew
The proper design of the clock distribution network helps ensure that critical timing requirements are satisfied and that no race conditions exist (see also clock skew).
Clock skew (sometimes called timing skew) is a phenomenon in synchronous digital circuit systems (such as computer systems) in which the same sourced clock signal arrives at different components at different times i.e. the instantaneous difference between the readings of any two clocks is called their skew.

Jitter

wanderphase jitterjitter buffer
Jitter
In electronics and telecommunications, jitter is the deviation from true periodicity of a presumably periodic signal, often in relation to a reference clock signal.

Self-clocking signal

self-clockingbitembedded
Self-clocking signal
In telecommunications and electronics, a self-clocking signal is one that can be decoded without the need for a separate clock signal or other source of synchronization.

Clock domain crossing

encompass several clock domains
Clock domain crossing
In digital electronic design a clock domain crossing (CDC), or simply clock crossing, is the traversal of a signal in a synchronous digital circuit from one clock domain into another.

Fan-out

fanoutfan outfanning out
Clock signals are typically loaded with the greatest fanout and operate at the highest speeds of any signal within the synchronous system.
Rather than simply wiring the output of a gate to 1000 different inputs, circuit designers have found that it runs much faster to have a tree (as an extreme example, a clock tree) – for example, have the output of that gate drive 10 buffers (or equivalently a buffer scaled 10 times as big as the minimum-size buffer), those buffers drive 100 other buffers (or equivalently a buffer scaled 100 times as big as the minimum-size buffer), and those final buffers to drive the 1000 desired inputs.

Pipeline (computing)

pipelinepipeliningpipelined
the careful insertion of pipeline registers into equally spaced time windows to satisfy critical worst-case timing constraints.
If the processing elements are synchronized and all take the same fixed time to process each item, then each item can be received by each element just as it is released by the previous one, in a single clock cycle.

Interconnects (integrated circuits)

interconnectinterconnectsglobal interconnect
Furthermore, these clock signals are particularly affected by technology scaling (see Moore's law), in that long global interconnect lines become significantly more resistive as line dimensions are decreased.
The top-most layers of a chip have the thickest and widest and most widely separated metal layers, which make the wires on those layers have the least resistance and smallest RC time constant, so they are used for power and clock distribution networks.

Integrated circuit design

IC designdigital circuit designIC design
Integrated circuit design
Clock insertion: Clock signal wiring is (commonly, clock trees) introduced into the design.

Bit-synchronous operation

Bit-synchronous operation
Bit-synchronous operation is a type of digital communication in which the data circuit-terminating equipment (DCE), data terminal equipment (DTE), and transmitting circuits are all operated in bit synchronism with a clock signal.