In-circuit test

In-circuit test (ICT) is an example of white box testing where an electrical probe tests a populated printed circuit board (PCB), checking for shorts, opens, resistance, capacitance, and other basic quantities which will show whether the assembly was correctly fabricated.

This is analogous to testing nodes in a circuit, e.g. in-circuit testing (ICT).

It may be performed with a bed of nails type test fixture and specialist test equipment, or with a fixtureless in-circuit test setup.

A traditional "bed of nails" tester for testing a PCB requires a custom fixture to hold the PCBA and the Pogo pins which make contact with the PCBA.

Named by analogy with a real-world bed of nails, these devices contain an array of small, spring-loaded pogo pins; each pogo pin makes contact with one node in the circuitry of the DUT (device under test).

For circuit boards, the DUT is often connected to the test equipment using a bed of nails tester of pogo pins.

Named by analogy with a real-world bed of nails, these devices contain an array of small, spring-loaded pogo pins; each pogo pin makes contact with one node in the circuitry of the DUT (device under test).

They are commonly found in automatic test equipment in the form of a bed of nails, where they facilitate the rapid, reliable connection of the devices under test (DUTs).

In-circuit test (ICT) is an example of white box testing where an electrical probe tests a populated printed circuit board (PCB), checking for shorts, opens, resistance, capacitance, and other basic quantities which will show whether the assembly was correctly fabricated.

In-circuit testing has been known to cause mechanical failures such as capacitor flex cracking and pad cratering.

Pad cratering most often occurs during dynamic mechanical events such as mechanical shock or board flexure due to In-circuit test (ICT), board depaneling, or connector insertion.

Bead probe technology (BPT) is technique used to provide electrical access (called “nodal access”) to printed circuit board (PCB) circuitry for performing in-circuit testing (ICT).

This technique of testing PCBs is being slowly superseded by boundary scan techniques (silicon test nails), automated optical inspection, and built-in self-test, due to shrinking product sizes and lack of space on PCB's for test pads.

AXI is often paired with the testing provided by boundary scan test, in-circuit test, and functional test.

Since modern PCs tend to omit serial ports, such integrated debug links can significantly reduce clutter for developers.) Production boards often rely on bed-of-nails connections to test points for testing and programming.

This technique of testing PCBs is being slowly superseded by boundary scan techniques (silicon test nails), automated optical inspection, and built-in self-test, due to shrinking product sizes and lack of space on PCB's for test pads.

A bed of nails tester is a traditional electronic test fixture which has numerous pins inserted into holes in an epoxy phenolic glass cloth laminated sheet (G-10) which are aligned using tooling pins to make contact with test points on a printed circuit board and are also connected to a measuring unit by wires.

Named by analogy with a real-world bed of nails, these devices contain an array of small, spring-loaded pogo pins; each pogo pin makes contact with one node in the circuitry of the DUT (device under test).

The hold-down force may be provided manually or by means of a vacuum or a mechanical presser, thus pulling the DUT downwards onto the nails.

This technique of testing PCBs is being slowly superseded by boundary scan techniques (silicon test nails), automated optical inspection, and built-in self-test, due to shrinking product sizes and lack of space on PCB's for test pads.

Current methods typically employ strain gaging or similar techniques to monitor board flexure.

More recently, some have looked at finite element simulation to proactively design or adjust an ICT fixture to avoid these mechanical failure modes.

This approach can be implemented as part of a design for manufacturability methodology to provide rapid feedback on ICT design and reduce costs.