Instruction set architecture

instruction setinstructionsinstructionISAcode densityarchitectureoperationregister pressureinstruction set architecturesoperations
An instruction set architecture (ISA) is an abstract model of a computer.wikipedia
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Central processing unit

CPUprocessorprocessors
A realization of an ISA, such as a central processing unit (CPU), is called an implementation.
A central processing unit (CPU), also called a central processor or main processor, is the electronic circuitry within a computer that executes instructions that make up a computer program.

Addressing mode

indirect addressingconditional executionindirect address
In general, an ISA defines the supported data types, the registers, the hardware support for managing main memory fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA.
Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs.

Machine code

machine languagenative codemachine instruction
An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations.
Machine code is a computer program written in machine language instructions that can be executed directly by a computer's central processing unit (CPU).

Microarchitecture

µarcharchitecturecomputer organization
It also enables the evolution of the microarchitectures of the implementations of that ISA, so that a newer, higher-performance implementation of an ISA can run software that runs on previous generations of implementations.
In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor.

X86 instruction listings

x86 instruction setMOVinstructions
For example, the Intel Pentium and the Advanced Micro Devices Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs.
The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support.

Bytecode

byte codebyte-codeintermediate code
Some virtual machines that support bytecode as their ISA such as Smalltalk, the Java virtual machine, and Microsoft's Common Language Runtime, implement this by translating the bytecode for commonly used code paths into native machine code.
Bytecode, also termed portable code or p-code, is a form of instruction set designed for efficient execution by a software interpreter.

Computer

computerscomputer systemdigital computer
An instruction set architecture (ISA) is an abstract model of a computer.
A stored-program computer includes by design an instruction set and can store in memory a set of instructions (a program) that details the computation.

Binary-code compatibility

binary compatiblebinary compatibilitybinary code compatibility
An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations.
For a compiled program on a general operating system, binary compatibility often implies that not only the CPUs (instruction sets) of the two computers are binary compatible, but also that interfaces and behaviours of the operating system and APIs, and the ABIs corresponding to those APIs, are sufficiently equal, i.e. "compatible".

Complex instruction set computer

CISCcomplex instruction set computingComplex Instruction Set
A complex instruction set computer (CISC) has many specialized instructions, some of which may only be rarely used in practical programs.
A complex instruction set computer (CISC ) is a computer in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.

Reduced instruction set computer

RISCreduced instruction set computingreduced instruction set
A reduced instruction set computer (RISC) simplifies the processor by efficiently implementing only the instructions that are frequently used in programs, while the less common operations are implemented as subroutines, having their resulting additional processor execution time offset by infrequent use.
A reduced instruction set computer, or RISC, is one whose instruction set architecture (ISA) allows it to have fewer cycles per instruction (CPI) than a complex instruction set computer (CISC).

IBM System/360

System/360IBM 360IBM/360
The concept of an architecture, distinct from the design of a specific machine, was developed by Fred Brooks at IBM during the design phase of System/360.
The least expensive model was the Model 20 with as little as 4096 bytes of core memory, eight 16-bit registers instead of the sixteen 32-bit registers of other System/360 models, and an instruction set that was a subset of that used by the rest of the range.

Very long instruction word

VLIWVariableVery Large Scale Instruction Words
Transmeta implemented the x86 instruction set atop VLIW processors in this fashion.
Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP).

Instruction-level parallelism

instruction level parallelisminstruction levelinstruction-level
These architectures seek to exploit instruction-level parallelism with less hardware than RISC and CISC by making the compiler responsible for instruction issue and scheduling.
Instruction-level parallelism (ILP) is a measure of how many of the instructions in a computer program can be executed simultaneously.

Control flow

looploopscontrol structure
More complex operations are built up by combining these simple instructions, which are executed sequentially, or as otherwise directed by control flow instructions.
In computer science, control flow (or flow of control) is the order in which individual statements, instructions or function calls of an imperative program are executed or evaluated.

Minimal instruction set computer

Minimum Instruction Set ComputerMISCP24 MISC
Architectures with even less complexity have been studied, such as the minimal instruction set computer (MISC) and one instruction set computer (OISC).
Such instruction sets are commonly stack-based rather than register-based to reduce the size of operand specifiers.

Computing

computer technologycomputing technologyapplied computing
The binary compatibility that they provide make ISAs one of the most fundamental abstractions in computing.
Program software performs the function of the program it implements, either by directly providing instructions to the computer hardware or by serving as input to another piece of software.

Input/output

I/Ooutputinterface
In general, an ISA defines the supported data types, the registers, the hardware support for managing main memory fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA.
In computer architecture, the combination of the CPU and main memory, to which the CPU can read or write directly using individual instructions, is considered the brain of a computer.

Predication (computer architecture)

Branch predicationconditional movepredication
A few instruction sets include a predicate field in every instruction; this is called branch predication.
In computer science, predication is an architectural feature that provides an alternative to conditional transfer of control, implemented by machine instructions such as conditional branch, conditional call, conditional return, and branch tables.

Vector processor

vector processingvectorarray processor
RISC instruction sets generally do not include ALU operations with memory operands, or instructions to move large blocks of memory, but most RISC instruction sets include SIMD or vector instructions that perform the same arithmetic operation on multiple pieces of data at the same time.
In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors, compared to the scalar processors, whose instructions operate on single data items.

Java virtual machine

JVMJava Runtime EnvironmentJRE
Some virtual machines that support bytecode as their ISA such as Smalltalk, the Java virtual machine, and Microsoft's Common Language Runtime, implement this by translating the bytecode for commonly used code paths into native machine code.
The JVM has instructions for the following groups of tasks:

Indirect branch

indirect jumpaddressed indirectlyindirect
An indirect branch (also known as a computed jump, indirect jump and register-indirect jump) is a type of program control instruction present in some machine language instruction sets.

MMX (instruction set)

MMXMMX instruction setMMX(+)
Various SIMD implementations have been brought to market under trade names such as MMX, 3DNow!, and AltiVec.
MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced

AltiVec

VMXVelocity EngineVMX128
Various SIMD implementations have been brought to market under trade names such as MMX, 3DNow!, and AltiVec.
AltiVec is a single-precision floating point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's Semiconductor Products Sector) — the AIM alliance.

3DNow!

Enhanced 3DNow!3DNow! extensionsExtended MMX
Various SIMD implementations have been brought to market under trade names such as MMX, 3DNow!, and AltiVec.
3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices (AMD).

Call stack

stackstack pointerstack frame
Many computer instruction sets provide special instructions for manipulating stacks.