Page table

Relationship between pages addressed by virtual addresses and the pages in physical memory, within a simple address space scheme. Physical memory can contain pages belonging to many processes. Pages can be held on disk if seldom used, or if physical memory is full. In the diagram above, some pages are not in physical memory.
Actions taken upon a virtual to physical address translation. Each translation is restarted if a TLB miss occurs, so that the lookup can occur correctly through hardware.
Two-level page table structure in x86 architecture (without PAE or PSE).
Three-level page table structure in x86 architecture (with PAE, without PSE).

Data structure used by a virtual memory system in a computer operating system to store the mapping between virtual addresses and physical addresses.

- Page table

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Memory management unit

Computer hardware unit having all memory references passed through itself, primarily performing the translation of virtual memory addresses to physical addresses.

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Schematic of the operation of an MMU
VLSI VI475 MMU "Apple HMMU" from the Macintosh II used with the Motorola 68020
Heterogeneous System Architecture (HSA) creates a unified virtual address space for CPUs, GPUs and DSPs, obsoleting the mapping tricks and data copying.

Most MMUs use an in-memory table of items called a "page table", containing one "page table entry" (PTE) per page, to map virtual page numbers to physical page numbers in main memory.

Memory paging

Memory management scheme by which a computer stores and retrieves data from secondary storage for use in main memory.

A human computer, with microscope and calculator, 1952

The invention of the page table let the processor operate on arbitrary pages anywhere in RAM as a seemingly contiguous logical address space.

Page (computer memory)

Virtual memory combines active RAM and inactive memory on DASD to form a large range of contiguous addresses.

A page, memory page, or virtual page is a fixed-length contiguous block of virtual memory, described by a single entry in the page table.

Translation lookaside buffer

Memory cache that stores the recent translations of virtual memory to physical memory.

General working of TLB
Flowchart shows the working of a translation lookaside buffer. For simplicity, the page-fault routine is not mentioned.

If the requested address is not in the TLB, it is a miss, and the translation proceeds by looking up the page table in a process called a page walk.

Copy-on-write

Resource-management technique used in computer programming to efficiently implement a "duplicate" or "copy" operation on modifiable resources.

Ada Lovelace, whose notes added to the end of Luigi Menabrea's paper included the first algorithm designed for processing by an Analytical Engine. She is often recognized as history's first computer programmer.

Copy-on-write can be implemented efficiently using the page table by marking certain pages of memory as read-only and keeping a count of the number of references to the page.

Virtual memory

Memory management technique that provides an "idealized abstraction of the storage resources that are actually available on a given machine" which "creates the illusion to users of a very large memory".

Virtual memory combines active RAM and inactive memory on DASD to form a large range of contiguous addresses.
The University of Manchester Atlas Computer was the first computer to feature true virtual memory.

Page tables are used to translate the virtual addresses seen by the application into physical addresses used by the hardware to process instructions; such hardware that handles this specific translation is often known as the memory management unit.

NX bit

Technology used in CPUs to segregate areas of memory for use by either storage of processor instructions (code) or for storage of data, a feature normally only found in Harvard architecture processors.

EDVAC, one of the first stored-program computers

The NX bit specifically refers to bit number 63 (i.e. the most significant bit) of a 64-bit entry in the page table.

PowerPC

Reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM.

IBM PowerPC 601 microprocessor
A schematic showing the evolution of the different POWER, PowerPC and Power ISAs
IBM PowerPC 604e 200 MHz
Custom PowerPC CPU from the Nintendo Wii video game console
The Freescale XPC855T Service Processor of a Sun SunFire V20z

Accesses to the "inverted page table" (a hash table that functions as a TLB with off-chip storage) are always done in big-endian mode.

Page fault

Exception that the memory management unit (MMU) raises when a process accesses a memory page without proper preparations.

Computer simulation, one of the main cross-computing methodologies.

This latter might be used by another process, in which case the OS needs to write out the data in that page (if it has not been written out since it was last modified) and mark that page as not being loaded in memory in its process page table.

Single address space operating system

Operating system that provides only one globally shared address space for all processes.

Charles Babbage, sometimes referred to as the "father of computing".

One advantage is that the same virtual-to-physical map page table can be used with every process (and in some SASOS, the kernel as well).