Tick–tock model

Tick-Tock modelTick-Tocktick–tockIntel Tick-TockIntel tick–tockProcess-Architecture-Optimizationtick
Tick–tock was a production model adopted in 2007 by chip manufacturer Intel.wikipedia
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Broadwell (microarchitecture)

BroadwellBroadwell microarchitectureBroadwell-EP
Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture.
It is a "tick" in Intel's tick–tock principle as the next step in semiconductor fabrication.

Kaby Lake

Kaby Lake RefreshKaby Lake-XAmber Lake
The first optimization of the Skylake architecture was Kaby Lake.
Breaking with Intel's previous "tick–tock" manufacturing and design model, Kaby Lake represents the optimized step of the newer "process-architecture-optimization" model.

Penryn (microarchitecture)

PenrynPenryn microarchitecturePenryn (tick)
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23.

Penryn (microprocessor)

PenrynPenryn-LPenryn-QC
During development, Penryn was the Intel code name for the 2007/2008 "Tick" of Intel's Tick-Tock cycle which shrunk Merom to 45 nanometers as CPUID model 23.

Die shrink

40nm110nm40 nm
Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick).
Intel, in particular, formerly focused on leveraging die shrinks to improve product performance at a regular cadence through its Tick-Tock model.

Yorkfield

Yorkfield XEYorkfield-6MYorkfield-CL
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was Penryn microarchitecture, the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23, replacing Kentsfield, the previous model.

Wolfdale (microprocessor)

WolfdaleWolfdale-3MWolfdale-CL
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was Penryn microarchitecture, the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23.

Intel Core (microarchitecture)

Core microarchitectureCoreIntel Core microarchitecture
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23.

Sandy Bridge

Intel Sandy BridgeSandy Bridge-EP2500K
This is known as the tick–tock model.

Haswell (microarchitecture)

HaswellHaswell-EHaswell microarchitecture
In 2014, Intel created a "tock refresh" of a tock in the form of a smaller update to the microarchitecture not considered a new generation in and of itself.
Haswell is the codename for a processor microarchitecture developed by Intel as the "fourth-generation core" successor to the Ivy Bridge (which is simply a die shrink/tick of Sandy-Bridge-microarchitecture).

Skylake (microarchitecture)

SkylakeSkylake-XSkylake-SP
Skylake is a microarchitecture redesign using the same 14 nm manufacturing process technology as its predecessor, serving as a "tock" in Intel's "tick–tock" manufacturing and design model.

Merom (microprocessor)

MeromMerom-2M
Together, Penryn and Merom represented the first 'tick-tock' in Intel's Tick-Tock manufacturing paradigm, in which Penryn was the 'tick' (new process) to Merom's 'tock' (new architecture).

List of Intel CPU microarchitectures

Valleyview (microarchitecture)
Additional details can be found in Intel's Tick-Tock model and Process-Architecture-Optimization model.

Silvermont

BraswellAirmontAvoton
According to the Tick–tock model Silvermont is the 22 nm die shrink (Tick) of Saltwell and Saltwell is the 32 nm die shrink of Bonnell so Silvermont seems to be part of the same microarchitecture named Bonell.

Process-Architecture-Optimization model

Intel Process-Architecture-Optimization Modelprocess–architecture–optimization
It replaced the two-phase Tick–tock model, adopted by Intel in 2006, because according to Intel the previous model was [and still is] no longer sustainable.

Intel

Intel CorporationIntel Corp.Intel Inside
Tick–tock was a production model adopted in 2007 by chip manufacturer Intel.

Microarchitecture

µarcharchitecturecomputer organization
Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick).

Form 10-K

10-K10-K report10-K Risk Factors
In March 2016, Intel announced in a Form 10-K report that it deprecated the tick–tock cycle in favor of a three-step "process–architecture–optimization" model, under which three generations of processors are produced under a single manufacturing process, with the third generation out of three focusing on optimization.

Coffee Lake

8th gen/Coffee Lake
Intel then announced a second optimization, Coffee Lake, making a total of four generations at 14 nm.

Semiconductor device fabrication

fabricatedsemiconductor fabricationsemiconductor manufacturing