V-11

ZMOS
The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).wikipedia
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VAX

DEC VAXVAX 11/780DEC VAX ULTRIX
The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).
At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300).

MicroVAX 78032

DEC MicroVAXMicroVAXMicroVAX 78032/78132
The V-11 was Digital's first VAX microprocessor design, but was the second to ship, after the MicroVAX 78032.
The MicroVAX 78032 contains 125,000 transistors on an 8.7 by 8.6 mm (74.82 mm 2 ) die that was fabricated in DEC's ZMOS process, a 3.0 µm NMOS logic process with two layers of aluminum interconnect.

VAX 8000

VAX 8600VAX 8800VAX 8500 and 8550
The V-11 was proprietary to DEC and was only used in their VAX 8200, VAX 8250, VAX 8300 and VAX 8350 minicomputers; and the VAXstation 8000 workstation.
They used the KA820 CPU module containing a V-11 microprocessor operating at 5 MHz (200 ns cycle) and supported a maximum of 128 MB of ECC memory.

DEC J-11

J-11DEC J11
The F chip was a derivative of the FPA, which belonged to the J-11 microprocessor chip set, an implementation of the PDP-11.
The data path chip and control chip were fabricated by Harris in a CMOS process while the FPA was fabricated by Digital in their "ZMOS" NMOS process.

Instruction set architecture

instruction setinstructionsinstruction
The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).

Semiconductor device fabrication

fabricatedsemiconductor fabricationsemiconductor manufacturing
The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).

Digital Equipment Corporation

DECDigitalDigital Equipment
The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).

International Solid-State Circuits Conference

ISSCCIEEE International Solid-State Circuits ConferenceInternational Solid State Circuits Conference
It was presented at the 39th International Solid State Circuits Conference held in 1984 alongside the MicroVAX 78032 and was introduced in early 1986 in systems, operating at 5 MHz (200 ns cycle time) and in 1987 at 6.25 MHz (160 ns cycle time).

Minicomputer

minicomputersmini-computermini
The V-11 was proprietary to DEC and was only used in their VAX 8200, VAX 8250, VAX 8300 and VAX 8350 minicomputers; and the VAXstation 8000 workstation.

VAXstation

VAXstation 3100VAXstation 2000VAXstation 4000
The V-11 was proprietary to DEC and was only used in their VAX 8200, VAX 8250, VAX 8300 and VAX 8350 minicomputers; and the VAXstation 8000 workstation.

Workstation

workstationscomputer workstationUnix workstation
The V-11 was proprietary to DEC and was only used in their VAX 8200, VAX 8250, VAX 8300 and VAX 8350 minicomputers; and the VAXstation 8000 workstation.

VAX-11

VAX-11/780VAX-11/750VAX 11/780
At 5 MHz, the V-11 performed approximately the same as the VAX-11/780 superminicomputer.

Superminicomputer

superminisuper-minissuperminis
At 5 MHz, the V-11 performed approximately the same as the VAX-11/780 superminicomputer.

Very Large Scale Integration

VLSIvery-large-scale integrationvery large-scale integration
The V-11 was part of the Scorpio program, which aimed at providing DEC with the ability to develop and fabricate very-large-scale integration (VLSI) integrated circuits (ICs).

Integrated circuit

integrated circuitsmicrochipchip
The V-11 was part of the Scorpio program, which aimed at providing DEC with the ability to develop and fabricate very-large-scale integration (VLSI) integrated circuits (ICs).

Computer-aided design

CADcomputer aided designCAD software
Other aspects of the program were the development of a new computer-aided design (CAD) suite and semiconductor process, the results of which are CHAS and ZMOS, respectively.

Parity bit

parityeven parityparity check
The MIB is 40 bits wide, the same width as a microword and is parity protected.

Control store

Writeable Control Storecontrol storagewritable control store
The ROM/RAM chip (DC327) implemented one-fifth of the patchable control store.

Read-only memory

ROMRead Only MemoryROMs
It contained a 16,384 by 8-bit (16 KB) read-only memory (ROM), a 1,024 by 8-bit (1 KB) random-access memory RAM and a 32 by 14-bit content-addressable memory (CAM).

Random-access memory

RAMmemoryrandom access memory
It contained a 16,384 by 8-bit (16 KB) read-only memory (ROM), a 1,024 by 8-bit (1 KB) random-access memory RAM and a 32 by 14-bit content-addressable memory (CAM).

Content-addressable memory

associative memorycontent addressable memoryTCAM
It contained a 16,384 by 8-bit (16 KB) read-only memory (ROM), a 1,024 by 8-bit (1 KB) random-access memory RAM and a 32 by 14-bit content-addressable memory (CAM).

Microsequencer

Microprogram Sequencer
The I/E chip (DC328) contained an instruction buffer, a microsequencer, an execution unit and a mini-translation buffer (MTB).

Execution unit

functional unitEUsexecution units
The I/E chip (DC328) contained an instruction buffer, a microsequencer, an execution unit and a mini-translation buffer (MTB).

Cache prefetching

prefetchinginstruction prefetchprefetch
The instruction buffer is a two-entry 32-bit buffer that held prefetched instructions.

Processor register

registersregistergeneral purpose register
The execution unit consisted of sixteen 32-bit general purpose registers defined by the VAX ISA, an arithmetic logic unit (ALU) and a shifter.